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  r09ds0033ej0100 rev.1.00 page 1 of 7 mar 28, 2012 data sheet ne5550279a silicon power ldmos fet features ? high output power : p out = 33.0 dbm typ. (v ds = 7.5 v, i dset = 40 ma, f = 460 mhz, p in = 15 dbm) ? high power added efficiency : add = 68% typ. (v ds = 7.5 v, i dset = 40 ma, f = 460 mhz, p in = 15 dbm) ? high linear gain : g l = 22.5 db typ. (v ds = 7.5 v, i dset = 40 ma, f = 460 mhz, p in = 0 dbm) ? high esd tolerance ? suitable for vhf to uhf-band class-ab power amplifier. applications ? 150 mhz band radio system ? 460 mhz band radio system ? 900 mhz band radio system ordering information part number order number package marking supplying form ne5550279a ne5550279a-a 79a (pb free) w7 ? 12 mm wide embossed taping ? gate pin faces the perforation side of the tape NE5550279A-T1 NE5550279A-T1-a ? 12 mm wide embossed taping ? gate pin faces the perforation side of the tape ? qty 1 kpcs/reel NE5550279A-T1a NE5550279A-T1a-a ? 12 mm wide embossed taping ? gate pin faces the perforation side of the tape ? qty 5 kpcs/reel remark to order evaluation samples, please contact your nearby sales office. part number for sample order: ne5550279a absolute maximum ratings (t a = 25 c, unless otherwise specified) operation in excess of any one of these parameters may result in permanent damage. parameter symbol ratings unit drain to source voltage v ds 30 v gate to source voltage v gs 6.0 v drain current i ds 0.6 a drain current (50% duty pulsed) i ds-pulse 1.2 a total power dissipation note p tot 6.25 w channel temperature t ch 150 c storage temperature t stg ? 55 to +150 c note: value at t c = 25 c caution observe precautions when handling because these devi ces are sensitive to electrostatic discharge. r09ds0033ej0100 rev.1.00 mar 28, 2012
ne5550279a r09ds0033ej0100 rev.1.00 page 2 of 7 mar 28, 2012 recommended operating range (t a = 25 c) parameter symbol test conditi ons min. typ. max. unit drain to source voltage v ds ? 7.5 9.0 v gate to source voltage v gs 1.65 2.20 2.85 v drain current i ds ? 0.4 ? a input power p in f = 460 mhz, v ds = 7.5 v ? 15 20 dbm electrical characteristics (t a = 25 c, unless otherwise specified) parameter symbol test conditi ons min. typ. max. unit dc characteristics gate to source leakage current i gss v gs = 6.0 v ? ? 100 na drain to source leakage current (zero gate voltage drain current) i dss v ds = 25 v ? ? 10 a gate threshold voltage v th v ds = 7.5 v, i ds = 1.0 ma 1.15 1.65 2.25 v drain to source breakdown voltage bv dss i ds = 10 a 25 38 ? v transconductance g m v ds = 7.5 v, i ds = 100 100 ma 1.8 2.2 2.9 s thermal resistance r th channel to case ? 20.0 ? c/w rf characteristics output power p out f = 460 mhz, v ds = 7.5 v, 31.5 33.0 ? dbm drain current i ds p in = 15 dbm, ? 0.38 ? a power drain efficiency d i dset = 40 ma (rf off) ? 70 ? % power added efficiency add ? 68 ? % linear gain g l note ? 22.5 ? db note: p in = 0 dbm remark dc performance is 100% testing. rf performanc e is testing several samples per wafer. wafer rejection criteria for standard dev ices is 1 reject for several samples.
ne5550279a r09ds0033ej0100 rev.1.00 page 3 of 7 mar 28, 2012 test circuit schematic for 460 mhz c20 c10 l2 l3 l4 in out c22 c11 c13 c21 c12 c14 c1 vds c1 l1 r1 vgs fet ne5550279a 50 50 components of test circuit for measuring electrical characteristics symbol value type maker c1 1 f grm188b31c105ka92 murata c10 22 pf grm1882c1h220ja01 murata c11 1.2 pf atc100a1r2jw american technical ceramics c12 4.7 pf atc100a4r7bw american technical ceramics c13 15 pf atc100a150bw american technical ceramics c14 12 pf atc100a120bw american technical ceramics c20 10 pf atc100a100jw american technical ceramics c21 3.9 pf atc100a3r9bw american technical ceramics c22 100 pf atc100a101jw american technical ceramics r1 2 k 1/10 w chip resistor koa rk73b1jttd202j l1 123 nh 0.5 mm, d = 3 mm, 10 turns ohesangyou l2 10 nh lqw18an10ng00 murata l3 9.8 nh 0.4 mm, d = 1.6 mm, 3 turns ohesangyou l4 20 nh 0.5 mm, d = 3 mm, 2 turns ohesangyou pcb ? r4775, t = 0.4 mm, r = 4.5, size = 30 48 mm panasonic sma connecter ? waka 01k0790-20 waka component layout of t est circuit for 460 mhz l1 c1 c1 l2 c10 l3 l4 c22 c20 c12 c14 c11 c21 r1 c13
ne5550279a r09ds0033ej0100 rev.1.00 page 4 of 7 mar 28, 2012 typical characteristics 1 (t a = 25 c) r: f = 460 mhz, v ds = 3.6/4.5/6/7.5/9 v, i dset = 40 ma, p in = ? 10 to 20 dbm im: f1 = 460 mhz, f2 = 461 mhz, v ds = 3.6/4.5/6/7.5/9 v, i dset = 40 ma, p out (2 tone) = 8 to 32 dbm 40 25 0.1 0 1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 ? 10 ? 5 10 15 0 5 25 20 30 35 ?15 ?10 ?5 0 5 10 15 20 p out - 3.6 v p out - 4.5 v p out - 6.0 v p out - 7.5 v p out - 9.0 v i ds - 3.6 v i ds - 6.0 v i ds - 4.5 v i ds - 9.0 v i ds - 7.5 v 40 25 10 0 80 20 30 40 50 60 70 0 5 10 15 20 25 30 35 ?15 ?10 ?5 0 5 10 15 20 g p - 3.6 v g p - 4.5 v g p - 6.0 v g p - 7.5 v g p - 9.0 v add - 3.6 v add - 6.0 v add - 4.5 v add - 9.0 v add - 7.5 v ?70 0 ? 10 ? 20 ?30 ?40 ?50 ?60 ?70 0 ? 10 ? 20 ?30 ?40 ?50 ?60 40 30 25 20 51015 35 35 30 25 20 51015 2f 0 - 3.6 v 2f 0 - 4.5 v 2f 0 - 6.0 v 2f 0 - 7.5 v 2f 0 - 9.0 v 3f 0 - 3.6 v 3f 0 - 6.0 v 3f 0 - 4.5 v 3f 0 - 9.0 v 3f 0 - 7.5 v im 3 - 3.6 v im 3 - 4.5 v im 3 - 6.0 v im 3 - 7.5 v im 3 - 9.0 v im 5 - 3.6 v im 5 - 6.0 v im 5 - 4.5 v im 5 - 9.0 v im 5 - 7.5 v 3rd/5th order intermodulation distortion im 3 /im 5 (dbc) 2 tones output power p out (2 tone) (dbm) output power p out (dbm) drain current i ds (a) input power p in (dbm) power gain g p (db) power added efficiency add (%) input power p in (dbm) 2nd harmonics 2f 0 (dbc) 3rd harmonics 3f 0 (dbc) output power p out (dbm) im 3 /im 5 vs. 2 tones output power 2f 0 , 3f 0 vs. output power output power, drain current vs. input power power gain, power added efficiency vs. input power remark the graphs indicate nominal characteristics.
ne5550279a r09ds0033ej0100 rev.1.00 page 5 of 7 mar 28, 2012 s-parameters s-parameters and noise parameters are provided on our web s ite in a format (s2p) that en ables the direct import of the parameters to microwave circuit simulators without the need for keyboard inputs. click here to download s-parameters. [rf devices] [design support] [development data download] url http://www.renesas.com/produc ts/microwave/download/index.jsp
ne5550279a r09ds0033ej0100 rev.1.00 page 6 of 7 mar 28, 2012 package dimensions 79a (unit: mm) 0.90.2 0.20.1 0.40.15 5.7 max. 5.7 max. 0.60.15 0.80.15 4.4 max. 4.2 max. source gate drain (bottom view) 3.60.2 1.50.2 1.2 max. 0.8 max. 1.0 max. source gate drain w 7 27001 79a package recommended p.c.b. layout (unit: mm) 1.7 4.0 0.5 1.0 5.9 1.2 gate source drain 0.5 6.1 0.5 through hole: 0.2 33 stop up the hole with a rosin or something to avoid solder flow.
ne5550279a r09ds0033ej0100 rev.1.00 page 7 of 7 mar 28, 2012 recommended soldering conditions this product should be soldered and mounted under the following recommended conditions. for soldering methods and conditions other than those recommended below, contact your nearby sales office. soldering method soldering conditions condition symbol infrared reflow peak temperature (package surface temperature) : 260 c or below time at peak temperature : 10 seconds or less time at temperature of 220 c or higher : 60 seconds or less preheating time at 120 to 180 c : 120 30 seconds maximum number of reflow processes : 3 times maximum chlorine content of rosin flux (% mass) : 0.2% (wt.) or below ir260 wave soldering peak temperature (molten solder temperature) : 260 c or below time at peak temperature : 10 seconds or less preheating temperature (pack age surface temperature) : 120 c or below maximum number of flow processes : 1 time maximum chlorine content of rosin flux (% mass) : 0.2% (wt.) or below ws260 partial heating peak temperature (terminal temperature) : 350 c or below soldering time (per side of device) : 3 seconds or less maximum chlorine content of rosin flux (% mass) : 0.2% (wt.) or below hs350 caution do not use different soldering methods together (except for partial heating).
all trademarks and registered trademarks are t he property of their respective owners. c - 1 revision history ne5550279a data sheet description rev. date page summary 1.00 mar 28, 2012 ? first edition issued
notice 1. all information included in this document is current as of the date this document is issued. such information, however, is s ubject to change without any prior notice. before purchasing or using any renesas electronics products listed herein, please confirm the latest product information with a renesas electronics sales office. also , please pay regular and careful attention to additional and different information to be disclosed by renesas electronics such as that disclosed through our website. 2. renesas electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property ri ghts of third parties by or arising from the use of renesas electronics products or technical information described in this document. no license, express, implied or otherwise, is granted hereby under any paten ts, copyrights or other intellectual property rights of renesas electronics or others. 3. you should not alter, modify, copy, or otherwise misappropriate any renesas electronics product, whether in whole or in part . 4. descriptions of circuits, software and other related information in this document are provided only to illustrate the operat ion of semiconductor products and application examples. you are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. renesas electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. 5. when exporting the products or technology described in this document, you should comply with the applicable export control l aws and regulations and follow the procedures required by such laws and regulations. you should not use renesas electronics products or the technology described in this document for any purpose rela ting to military applications or use by the military, including but not limited to the development of weapons of mass destruction. renesas electronics products and technology may not be used for or incorporate d into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations. 6. renesas electronics has used reasonable care in preparing the information included in this document, but renesas electronics does not warrant that such information is error free. renesas electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information incl uded herein. 7. renesas electronics products are classified according to the following three quality grades: "standard", "high quality", an d "specific". the recommended applications for each renesas electronics product depends on the product's quality grade, as indicated below. you must check the quality grade of each renesas electronics produ ct before using it in a particular application. you may not use any renesas electronics product for any application categorized as "specific" without the prior written consent of renesas electronics. fu rther, you may not use any renesas electronics product for any application for which it is not intended without the prior written consent of renesas electronics. renesas electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any renesas electronics product for an application categorized as "specific" or for which the product is not intended wh ere you have failed to obtain the prior written consent of renesas electronics. the quality grade of each renesas electronics product is "standard" unless otherwise expressly specified in a renesas electroni cs data sheets or data books, etc. "standard": computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment ; home electronic appliances; machine tools; personal electronic equipment; and industrial robots. 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